tag:blogger.com,1999:blog-8531143406441550247.post7741492044228041595..comments2017-04-11T09:38:06.837+02:00Comments on SDR with BladeRF: ModelSim testbench is the perfect companion for BladeRF VHDL-developmentKees de Grootnoreply@blogger.comBlogger3125tag:blogger.com,1999:blog-8531143406441550247.post-47267322373824580062014-05-06T16:58:45.081+02:002014-05-06T16:58:45.081+02:00You can use them, in synthesizable code, if they a...You can use them, in synthesizable code, if they are only referenced in the declarative region of the architecture and not the statement part (aka: before the 'begin' statement).<br /><br />There are synthesizable fixed and floating point packages written by David Bishop for the VHDL-2008 standard.<br /><br />Personally I would stay away from the floating point due to the size, but the fixed point packages can be useful if you don't like doing the fixed point math yourself.Brianhttp://www.blogger.com/profile/09270339172406238044noreply@blogger.comtag:blogger.com,1999:blog-8531143406441550247.post-26146393653290189892014-05-05T20:54:22.543+02:002014-05-05T20:54:22.543+02:00I would be careful with using the ieee.math_real a...I would be careful with using the ieee.math_real and ieee.math_complex libraries. Are they fully synthesizable?Anonymousnoreply@blogger.comtag:blogger.com,1999:blog-8531143406441550247.post-9484436496100376652014-05-04T17:08:17.223+02:002014-05-04T17:08:17.223+02:00I am glad you were able to get ModelSim to work fo...I am glad you were able to get ModelSim to work for you!<br /><br />Some tips - there is an ieee.math_real library which will give you floating point numbers as well as sin(), cos(), etc. VHDL is very strict with this type, so you need a decimal point to define it as a real number as such:<br /><br /> constant val : real := 0.0 ;<br /><br />There is also an ieee.math_complex which gives you a record for the real/imaginary pair.<br /><br />Next, you are probably wondering how to get back and forth between types. When it comes to conversion between integer and real, you just need a normal cast.<br /><br /> constant VAL : integer := integer(4096.0*cos(MATH_PI/7.0)) ;<br /><br />The converse is the same for integer to real:<br /><br /> constant VAL : real := real(4096*2) ;<br /><br />To get between integer and signed/unsigned types, there are the to_ functions, as such:<br /><br /> constant SVAL : signed(15 downto 0) := to_signed(4096,16) ;<br /> constant IVAL : integer := to_integer(SVAL) ;<br /><br />The second argument in to_signed() is the length of the resulting vector. To make things generic and easy, it's best to use the 'length of a signal you've already defined:<br /><br /> signal someval : signed(15 downto 0) ;<br /> ...<br /> someval <= to_signed(14, someval'length) ;<br /><br />So you know you are always going to convert to that length and not get length mismatch errors.<br /><br />Lastly, I noticed your clock statement was a little more cumbersome than it had to be. What I typically do is:<br /><br /> signal clock : std_logic := '1' ;<br /> ...<br /> clock <= not clock after 1 ns ;<br /><br />If you wish to setup an actual frequency, you can do something like this:<br /><br /> constant FS : real := 38.4e6 ;<br /> ...<br /> clock <= not clock after (1.0/FS)/2.0 * (1 sec) ;<br /><br />The reason for the other division by 2.0 is to make it a half pulse width transition.<br /><br />I hope this is useful for you. I know I find ModelSim to be extremely useful in vetting out designs in general!Brianhttp://www.blogger.com/profile/09270339172406238044noreply@blogger.com